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A 0.5V 2.2pW 2-transistor voltage reference

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4 Author(s)
Mingoo Seok ; Univ. of Michigan, Ann Arbor, MI, USA ; Gyouho Kim ; Sylvester, D. ; Blaauw, D.

A voltage reference using a depletion-mode device is designed in a 0.13 mum CMOS process and achieves ultra-low power consumption and sub-1V operation without sacrificing temperature and supply voltage insensitivity. Measurements show a temperature coefficient of 19.4 ppm/degC (3.4 muV/degC), line sensitivity of 0.033%/V, power supply rejection ratio of -67 dB, and power consumption of 2.2 pW. It requires only two devices and functions down to Vdd = 0.5 V with an area of 1350 mum2. A variant for higher Vout is also demonstrated.

Published in:

Custom Integrated Circuits Conference, 2009. CICC '09. IEEE

Date of Conference:

13-16 Sept. 2009