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An ultra low power non-volatile memory in standard CMOS process for passive RFID tags

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3 Author(s)
Peng Feng ; Inst. of Semicond., Chinese Acad. of Sci., Beijing, China ; Yunlong Li ; Wu, Nanjian

An ultra low power non-volatile memory is designed in a standard CMOS process for passive RFID tags. The memory can operate in a new low power operating scheme under a wide supply voltage and clock frequency range. In the charge pump circuit the threshold voltage effect of the switch transistor is almost eliminated and the pumping efficiency of the circuit is improved. An ultra low power 192-bit memory with a register array is implemented in a 0.18 muM standard CMOS process. The measured results indicate that, for the supply voltage of 1.2 volts and the clock frequency of 780 KHz, the current consumption of the memory is 1.8 muA (3.6muA) at the read (write) rate of 1.3 Mb/s (0.8 Kb/s).

Published in:

Custom Integrated Circuits Conference, 2009. CICC '09. IEEE

Date of Conference:

13-16 Sept. 2009