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500 MHz testing on a 100 MHz tester

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3 Author(s)
Wimmers, D. ; Schlumberger Technol., San Jose, CA, USA ; Sakaitani, K. ; West, B.

This paper describes an innovative way to test certain classes of complex digital devices at speeds of 500 MHz or more in a 100 MHz tester whose architecture incorporates the ability to generate a large number of edges per tester period. The means for generating the test patterns, and the means for executing them, are both described

Published in:

Test Conference, 1994. Proceedings., International

Date of Conference:

2-6 Oct1994