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High-speed 10-bit LCD column driver with a split DAC and a class-AB output buffer

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4 Author(s)
Jong-Kwan Woo ; Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea ; Dong-Yong Shin ; Deog-Kyoon Jeong ; Suhwan Kim

We propose a high-speed rail-to-rail 10-bit column driver with a reduced die area for LCD-TV applications. This column driver combines an 8-bit resistor-string digital-to-analog converter (R-DAC), constructed using a hybrid-type decoder to reduce the RC time delay and die area, with a 2-bit interpolation DAC. In the output buffer, error amplifiers drive a column line so as to realize a highspeed rail-to-rail drive. Gamma-corrected output voltages are generated by the resistor string of R-DAC, which contains resistors of unequal values that match the inverse of the liquid crystal transmittance-voltage characteristic. A prototype 10- bit LCD column driver was designed and fabricated using a 0.3 mum CMOS technology, and has a settling time of within 2 mus and a quiescent current of 5.4 muA per channel.

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Consumer Electronics, IEEE Transactions on  (Volume:55 ,  Issue: 3 )