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Object-oriented high-level modeling of system components for the generation of VHDL code

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3 Author(s)
Agsteiner, K. ; Dept. of Comput. Sci., Tech. Univ. Chemnitz, Germany ; Monjau, D. ; Schulze, S.

This paper describes a method for the design of digital systems that automatically derives an executable prototype of a system from an informal specification. Our method bases on an object-oriented hierarchy of classes which describe the functions of components. A tree of instances of these classes representing a certain system is built depending on the specification. VHDL descriptions of all classes involved in this tree are transformed into VHDL code for the complete system. Our approach emphasizes a bottom-lip procedure and reuse of existing components

Published in:

Design Automation Conference, 1995, with EURO-VHDL, Proceedings EURO-DAC '95., European

Date of Conference:

18-22 Sep 1995