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Trap-assisted charge transport has been under study for long time in connection with a wide range of problems in microelectronics: the influence on the operation of MNOS memory transistors, the capacity enhancement of electrically programmable read-only memories (EPROMs), or reliability issues of insulators with high dielectric constant. The problem of the trap-assisted tunneling in LED has been addressed at the qualitative level. Relatively few quantitative analyses are reported in the literature, of which none deals with the behavior of this phenomenon at high temperatures. Our study aims to fill this gap by introducing a quantitative model of electronic trap in a dielectric environment.