Scheduled System Maintenance on May 29th, 2015:
IEEE Xplore will be upgraded between 11:00 AM and 10:00 PM EDT. During this time there may be intermittent impact on performance. For technical support, please contact us at onlinesupport@ieee.org. We apologize for any inconvenience.
By Topic

FPGA-based NoC-driven sequence of lab assignments for manycore systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Ttofis, C. ; Dept. of Electr. & Comput. Eng., Univ. of Cyprus, Nicosia, Cyprus ; Kyrkou, C. ; Theocharides, T. ; Michael, M.K.

Manycore systems are expected to emerge as the dominant trend in next generation computer systems. These parallel systems are expected to be interconnected via packet-based Networks-on-Chip (NoC). As such, they present several educational challenges, as their design is affected by a large number of NoC-based design-space parameters. NoC-based manycore systems demand modifications in the existing computer related teaching curricula. In this work we present a practical FPGA-based teaching framework to emulate NoC-based manycore systems that instructors can utilize to teach students the fundamental design concepts of NoC-based manycore systems and their integration through a series of VHDL laboratory assignments.

Published in:

Microelectronic Systems Education, 2009. MSE '09. IEEE International Conference on

Date of Conference:

25-27 July 2009