By Topic

FPGA-based NoC-driven sequence of lab assignments for manycore systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

The purchase and pricing options are temporarily unavailable. Please try again later.
4 Author(s)
Ttofis, C. ; Dept. of Electr. & Comput. Eng., Univ. of Cyprus, Nicosia, Cyprus ; Kyrkou, C. ; Theocharides, T. ; Michael, M.K.

Manycore systems are expected to emerge as the dominant trend in next generation computer systems. These parallel systems are expected to be interconnected via packet-based Networks-on-Chip (NoC). As such, they present several educational challenges, as their design is affected by a large number of NoC-based design-space parameters. NoC-based manycore systems demand modifications in the existing computer related teaching curricula. In this work we present a practical FPGA-based teaching framework to emulate NoC-based manycore systems that instructors can utilize to teach students the fundamental design concepts of NoC-based manycore systems and their integration through a series of VHDL laboratory assignments.

Published in:

Microelectronic Systems Education, 2009. MSE '09. IEEE International Conference on

Date of Conference:

25-27 July 2009