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Through-silicon via filling process using pulse reversal plating

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6 Author(s)
Xinxin Yang ; Sch. of Mater. Sci. & Eng., Shanghai Jiao Tong Univ., Shanghai, China ; Huiqin Ling ; Dongyan Ding ; Ming Li
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Though silicon vias filled by pulse reversal current, and influences of frequency of pulse current and reverse current density are investigated. Chronopotentiometry was applied to analyze the principle of these effects. It was found that when frequency is too high, the reverse current was mainly consumed in process of charge-discharge of electric double layer; it cannot play the role of dissolving copper deposit on surface of via and orifice. For pulse reversal plating, low frequency is required. Generally frequency less than 40 Hz is suitable in this system. High reverse current density could suppress copper growth on surface and at the orifice. It is beneficial for bottom-up via filling. However, if reverse current is too high, plating speed could be serious inhibited. In our study, 1:2 is the best ratio of forward and reverse current density.

Published in:

Electronic Packaging Technology & High Density Packaging, 2009. ICEPT-HDP '09. International Conference on

Date of Conference:

10-13 Aug. 2009