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The Golem B computer is a fast machine using emitter-coupled logic and multi-layer circuits. The autonomous floating point arithmetic unit obtains its instructions and operands from buffers loaded ahead of need. Its main part, for 56-bit fractions, uses two 4-operand adder complexes with stored carries. In multiplication instructions, 4 bits of the multiplier are used to form a new partial product in each pass through an adder complex. Division instructions use a base-4 non-restoring algorithm. Addition favours the case of equal or nearly equal exponents, but 112 sum bits are accumulated for all exponent differences. An effort has been made to provide instructions and number formats that will aid the writing of compilers and operating systems.