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RFID is now attracting many interests for its bright future in commercial. The paper introduces UHF RFID reader software design. The design used the hierarchical structure. It included the physical layer and the tag-identification layer. Physical layer is that the coding and modulation. It is described in verilog HDL language and implemented in FPGA. Tag-identification layer are commands which used to identify and modify tags. It described in C language and implemented in Nios II core embedded in FPGA. The software structure have flexible and efficient advantages.