Cart (Loading....) | Create Account
Close category search window
 

Noise susceptibility of integrated circuits in digital systems

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Hosier, W.J. ; British Aircraft Corporation, Stevenage, UK

The particular effects of noise upon logic gate and flip-flop circuits and the resultant general effects upon digital systems are considered. Common sources of noise are outlined andtheir significance in integrated circuit systems is considered. Such sources include crosstalk, reflections, common-earth impedance coupling and supply line noise. Present methods of assessment and specification of d.c. noise margin and a.c. or pulse noise immunity are reviewed and examples are given of the application of such methods to representative commercial integrated circuits.

Published in:

Radio and Electronic Engineer  (Volume:36 ,  Issue: 5 )

Date of Publication:

November 1968

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.