Close category search window
 

Ant colony optimization based scheduling for a semiconductor wafer fabrication facility with bottleneck stations

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Li Li ; Sch. of Electron. & Inf. Eng., Tongji Univ., Shanghai, China ; Fei Qiao ; Xiaoyu Tian ; Qidi Wu

In this paper, it is firstly noted that the scheduling of a semiconductor wafer fabrication facility (fab) has its special complexities, such as large scale, a mixed of different processing types, unbalanced production facilities, short-term efficient scheduling period, non-zero state at the decision point time, etc. Secondly, the scheduling model for a wafer fab, composed of a machine set, a task set, a processing time set and the optimized objective function focused on the movements and delivery performance of the jobs, is built with fully consideration on its characteristics. Thirdly, an ant colony optimization based scheduling algorithm (abbreviated as LSA-WF) is proposed. The main idea of LSA-WF is the scheduling of the bottleneck machines of a wafer fab is considered first and foremost, the scheduling of the batch processing machines with recipe constraint is in the next place, the scheduling of machines by wafer or by lot is the third, and the scheduling for the batch processing machines without recipe constraint is the last. The same type of machines is ranked by their workloads in the descending order. Then the simulations on a real wafer fab are used to verify and validate the proposed method. The simulation results show that the proposed method is superior to the common rules (such as FIFO, EDD, SRPT and CR) with more movements of the jobs and higher machine utilities. Finally, the summarization of the research results is given.

Published in:
Automation and Logistics, 2009. ICAL '09. IEEE International Conference on

Date of Conference: 5-7 Aug. 2009

Need Help?


IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2013 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.