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Realization of Gmicro/200

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4 Author(s)
Inayoshi, H. ; Hitachi Ltd., Tokyo, Japan ; Kawasaki, I. ; Nishimukai, T. ; Sakamura, K.

The Gmicro/200, a microprocessor that has been developed as part of Japan's TRON (The Real-Time Operating Nucleus) project, is described. This microprogram-based processor with six-state pipeline, 730000 transistors and on-chip caches will serve in an engineering workstation or a high-speed graphics accelerator system. The authors discuss features of the instruction set; memory management; handling of exceptions, interrupts and traps; and the implementation of the Gmicro/200.<>

Published in:

Micro, IEEE  (Volume:8 ,  Issue: 2 )