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Probabilistic modeling and fault analysis in sequential logic using computer simulation

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3 Author(s)
Das, S.R. ; Inst. of Comput. Eng., Nat. Chiao Tung Univ., Hsinchu ; Jone, W.B. ; Wong, K.L.

The problem of detecting permanent faults in sequential circuits by random testing is analyzed utilizing a continuous parameter Markov model. Given a sequential circuit with certain stuck faults specified, the original state table and its error version can be readily derived from an analysis of the circuit under fault-free and faulty conditions, respectively. By simulation of these two tables on a computer, the parameters of the desired Markov model can be obtained. The approach does not require formulation of a product state table corresponding to the fault-free state table and its faulty version, which is rather difficult, when dealing with large circuits. For a specified confidence degree, it is easy to derive the parameters of the model and to calculate the required lengths of random test patterns or the maximum testing time. A complete mathematical analysis of the model is given. It provides insight into the nature of faults in relation to random testing and the associated confidence degree

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Systems, Man and Cybernetics, IEEE Transactions on  (Volume:20 ,  Issue: 2 )