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ESD protection design for mixed-voltage I/O buffer by using stacked-NMOS triggered SCR device

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3 Author(s)
Ming-Dou Ker ; Integrated Circuits&Syst. Lab., Nat. Chiao-Tung Univ., Hsinchu, Taiwan ; Chien-Hui Chuang ; Hsin-Chin Jiang

A new ESD protection circuit, by using the stacked-NMOS triggered silicon controlled rectifier (SNTSCR) as the ESD clamp device, is designed to protect the mixed-voltage I/O buffers of CMOS IC's. Without using the thick gate oxide, the experimental results in a 0.35-mum CMOS process have proven that the human-body-model ESD level of the mixed-voltage I/O buffer can be successfully increased from the original ~2 kV to become > 8 kV by using this new proposed ESD protection circuit.

Published in:

Electrical Overstress/Electrostatic Discharge Symposium, 2001. EOS/ESD '01.

Date of Conference:

11-13 Sept. 2001