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The application of Transmission Line Pulse testing for the ESD analysis of integrated circuits

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4 Author(s)
T. Smedes ; Philips Semiconductors, Gerstweg 2, 6534 AE Nijmegen, the Netherlands ; R. M. D. A. Velghe ; R. S. Ruth ; A. J. Huitsing

TLP, well known for device characterisation, applied to full integrated circuits offers valuable data for analysis of ESD behaviour. TLP is the only method to study ESD behaviour during zapping and as such provides knowledge about actual ESD current paths. As illustrated by examples, this gives valuable suggestions for improving circuit designs.

Published in:

Electrical Overstress/Electrostatic Discharge Symposium, 2001. EOS/ESD '01.

Date of Conference:

11-13 Sept. 2001