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An improved equalization circuit for 10-Gb/s high-speed serial transmission over backplane channel

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4 Author(s)
Bo Wang ; Dept. of Electron., Carleton Univ., Ottawa, ON, Canada ; Dianyong Chen ; Bangli Liang ; Kwasniewski, T.

This paper presents an improved equalization circuit, with a linear equalizer (LE) and a decision feedback equalizer (DFE) in the receiver, for 10-Gb/s high-speed serial data transmission over highly lossy electrical backplane channels. Although DFE provides an effective way to compensate various channel impairments, the pre-cursor inter-symbol interference (ISI) is still a significant problem for channel equalization. With the new equalization method, the pre-cursor ISI is compensated with the linear equalizer, and the post-cursor ISI is cancelled by the DFE. The improved equalization circuit with programmable linear equalizer and a 3-tap DFE is implemented to work at 10-Gb/s and compensate the channel loss of -20 dB. The results show it outperform a traditional 5-tap DFE in vertical eye-opening.

Published in:

Communications, Circuits and Systems, 2009. ICCCAS 2009. International Conference on

Date of Conference:

23-25 July 2009