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Synchronizing processors through memory requests in a tightly coupled multiprocessor

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2 Author(s)
Seznec, A. ; IRISA/INRIA, Rennes, France ; Jegou, Y.

The Greedy network, an interconnection network (IN) for tightly coupled multiprocessors (TCMs), is introduced. An original and cost-effective hardware mechanism is proposed. When DSPA pipeline processors are connected with a shared memory through a Greedy network and synchronized by the authors' synchronization mechanism, a very high parallelism may be achieved at execution time on a very large spectrum of loops, including loops where independency of the successive insertions cannot be checked at compile time

Published in:

Computer Architecture, 1988. Conference Proceedings. 15th Annual International Symposium on

Date of Conference:

30 May-2 Jun 1988

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