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In this work, we study two distinct electrical behaviors, which are often observed in Si nanocrystal memory gate stacks: the transient peak of the current-voltage characteristics and the frequency dependence of the admittance characteristics at strong accumulation. These effects are manifestations of a high electrical transparency tunnel oxide in conjunction with a good quality control oxide. The high electrical transparency tunnel oxide results from hydrogen-related defects that are formed within it during the high temperature processing steps and promotes the electrical communication between the silicon substrate and the silicon nanocrystal layer at low electric fields, while no significant charge transfer is observed at low voltages between the silicon nanocrystals and the gate electrode. These conditions favor the electrical charging/discharging of the silicon nanocrystal layer via the trap-assisted tunneling mechanism and to the appearance of electrostatic screening effects. These dynamic phenomena appear either as a displacement current peak at the onset of accumulation or as frequency dependent admittance characteristics at strong accumulation.