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PLABEK: a complete automatic test pattern generation system for break faults in programmable logic arrays

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3 Author(s)
Gwo-Haur Hwang ; VLSI Support Center, MOTC, Taoyuan, Taiwan ; Wen-Zen Shen, ; Shing Tenqchen

In this paper, a complete PLA break fault ATPG system, PLABEK, is proposed. PLABEK contains four main parts: 1) break fault collapsing; 2) pruning algorithm based test pair generation; 3) serial-fault-injection parallel-bit-operation event-driven break fault simulation; and 4) testability-measure-based fault ordering. Experimental results show that PLABEK can generate complete compact test sequences for PLA's break faults very fast

Published in:
VLSI Technology, Systems, and Applications, 1995. Proceedings of Technical Papers. 1995 International Symposium on

Date of Conference: 31 May-2 Jun 1995

Page(s):
87 - 92
Meeting Date :
31 May 1995-02 Jun 1995
Print ISBN:
0-7803-2773-X
INSPEC Accession Number:
5205279
Conference Location :
Taipei
Digital Object Identifier :
10.1109/VTSA.1995.524639

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