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Data Center Switch Architecture in the Age of Merchant Silicon

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3 Author(s)
Farrington, N. ; Dept. of Comput. Sci. & Eng., UC San Diego, San Diego, CA, USA ; Rubow, E. ; Vahdat, A.

Today, data center networks that scale to tens of thousands of ports require the use of highly-specialized ASICs, with correspondingly high development costs. Simultaneously, these networks also face significant performance and management limitations. Just as commodity processors and disks now form the basis of computing and storage in the data center, we argue that there is an opportunity to leverage emerging high-speed commodity merchant switch silicon as the basis for a scalable, cost-effective, modular, and more manageable data center network fabric. This paper describes how to save cost and power by repackaging an entire data center network as a distributed multi-stage switch using a fat-tree topology and merchant silicon instead of proprietary ASICs. Compared to a fat tree of discrete packet switches, a 3,456-port 10 Gigabit Ethernet realization of our architecture costs 52% less, consumes 31% less power, occupies 84% less space, and reduces the number of long, cumbersome cables from 6,912 down to 96, relative to existing approaches.

Published in:

High Performance Interconnects, 2009. HOTI 2009. 17th IEEE Symposium on

Date of Conference:

25-27 Aug. 2009