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Dual cantilever beam (DCB) mechanical testing is applied to two kinds of chips, manufactured in the 45 nm technology node. Both chips consist of different numbers of ultra low-k (ULK) dielectric layers, however, they have similarly designed crack-stop structures. It is shown that in all cases, cohesive cracking occurred in the upper ULK layers. The crack-stops hamper the crack propagation, and cracks are deflected outside the interconnect stack. The paths of the deflected crack fronts are FIB-sectioned and imaged in SEM. The increasing number of ULK layers leads to decrease in effective Gc of the stack.