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BDD FTEST: fast, backtrack-free test generator based on binary decision diagram representation

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2 Author(s)
Bechir, A. ; Dept. of Electr. & Comput. Eng., Ecole Polytech. de Montreal, Que., Canada ; Kaminska, B.

This paper presents a new approach for generating test vectors for combinational circuits. In the approach presented here, the automatic test generator, called BDD FTEST, uses an algebraic method to find a set of test vectors for single stuck lines. For all the circuits analyzed, the algorithm is faster than previously algebraic methods. Experimental results demonstrate that, for most circuits, our algorithm can generate test vectors for all faults in a very short time, particularly for large circuits like the c7552

Published in:

Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on  (Volume:3 )

Date of Conference:

30 Apr-3 May 1995