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This paper presents the implementation of band-to-band tunneling (BTBT) mechanisms into the compact model of a conventional carbon nanotube transistor FET featuring a MOSFET-like operation. Appropriate equations enable the calculation of the BTBT current as well as the charge pileup in the channel. To ensure the model accuracy and validate the equation set, the compact model simulation results are methodically compared with nonequilibrium Green function ones. Afterward, the investigations on the BTBT effects with respect to the figures of merits of the transistor and circuit have led to draw the conclusion that their impact is of utmost importance for large-signal analog and digital circuit designs. Neglecting the BTBT phenomena lead to an underestimation of more than 50% of the gate inverter delay and to an underestimation of power consumption of 30%. Finally, tradeoff recommendations between chirality and operating bias voltage are presented.