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Prolog to Analog Circuit Design in Nanoscale CMOS Technologies

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1 Author(s)

Success in the emerging era of nanoscale analog CMOS devices will depend on recognizing early in the design phase the many physical layout factors that ultimately determine circuit performance. This paper examines several physical design strategies that could lessen the impact of collateral forces that might not otherwise become apparent until the post-layout phase is reached.

Published in:

Proceedings of the IEEE  (Volume:97 ,  Issue: 10 )