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Analysis of Trapped Charges in Dopant-Segregated Schottky Barrier-Embedded FinFET SONOS Devices

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4 Author(s)
Sung-Jin Choi ; Div. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea ; Jin-Woo Han ; Jang, Moongyu ; Choi, Yang-Kyu

The aim of this letter is to analyze the spatial distribution of trapped charges in the type of dopant-segregated Schottky barrier (DSSB)-embedded FinFET SONOS devices used in NAND-type flash memory. Due to localized programming by carrier injection with extra kinetic energy, the spatial distribution of electrons trapped in an O/N/O layer of a DSSB SONOS device after a short time of programming differs from that in an O/N/O layer of a conventional SONOS device, which results in the degradation of subthreshold slope (SS). Note that the degraded SS recovers as the program time increases. The measured and simulated data confirm that the high speed of the programming is due largely to the localized trapped charges injected from DSSB source/drain junctions.

Published in:

Electron Device Letters, IEEE  (Volume:30 ,  Issue: 10 )