Skip to Main Content
In this paper, we present the analysis, design, and implementation of an integrated power distributed amplifier (DA), fabricated in a low-cost 0.25-mum SiGe BiCMOS technology. The circuit consists of four novel inductively peaked cascode gain cells, which are capacitively coupled to the base line for power optimization and bandwidth enhancement. Due to the tapered collector line, no output termination resistor is required, which provides higher efficiency. Design tradeoffs for maximum bandwidth, gain, output power, and efficiency are discussed by means of analytical calculations and simulations. A gain of 11 dB with a gain flatness of plusmn1 dB has been measured over a frequency range from 1 to 12 GHz. 19.5-dBm output power is obtained at the 1-dB compression point (P1 dB) in the desired frequency range with an associated power-added efficiency of 22.1% and a maximum output third-order intercept point of 31.5 dBm. The power dissipation of the amplifier is 400 mW from a 5-V supply. On-chip biasing is implemented via low dropout voltage reference driven by a bandgap voltage source. To the authors' knowledge, this is the highest output power achieved by an HBT DA in SiGe technology in this frequency range. The chip size is 2.1 mm2. Good agreement between simulation and measurement were achieved.