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Combinatorial Reliability Analysis of Multiprocessor Computers

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2 Author(s)
Kai Hwang ; School of Electrical Engineering; Purdue University; W. Lafayette, Indiana 47907 USA. ; Tian-Pong Chang

This paper proposes a combinatorial method to evaluate the reliability of multiprocessor computers. Multiprocessor structures are classified as crossbar switch, time-shared buses, and multiport memories. Closed-form reliability expressions are derived via combinatorial path enumeration on the probabilistic-graph representation of a multiprocessor system. The method can analyze the reliability performance of real systems like ``C.mmp'', ``Tandem 16'', and ``Univac 1100/80''. User-oriented performance levels are defined for measuring the performability of degradable multiprocessor systems. For a regularly structured multiprocessor system, it is fast and easy to use this technique for evaluating system reliability with statistically independent component reliabilities. System availability can be also evaluated by this reliability study.

Published in:

IEEE Transactions on Reliability  (Volume:R-31 ,  Issue: 5 )