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Design of a very linear CMOS transconductance input stage for continuous-time filters

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4 Author(s)
P. M. Van Peteghem ; Dept. of Electr. Eng., Texas A&M Univ., College Station, TX, USA ; H. M. Fossati ; G. L. Rice ; S. -Y. Lee

A CMOS differential input stage for transconductance amplifiers that combines a low noise excess factor, low input capacitance, and high common-mode rejection ratio with a very good linearity is described. The measured distortion is only 0.2% for a 1-V RMS input signal and only 1% for a 2-V RMS input signal on a test circuit implemented in a standard 3-μm CMOS process, using ±5-V supplies, resulting in over 85 dB of dynamic range. Applications include high-performance continuous-time filters and linear amplifiers

Published in:

IEEE Journal of Solid-State Circuits  (Volume:25 ,  Issue: 2 )