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An improved polynomial-time algorithm for designing digital filters with power-of-two coefficients

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3 Author(s)
Chao-Liang Chen ; Integrated Circuits & Syst. Lab., California Univ., Los Angeles, CA, USA ; Kei-Yong Khoo ; Willson, A.N., Jr.

An improved algorithm is presented for designing digital filters with coefficients expressed as sums of signed power-of-two (SPT) terms. Our algorithm allocates SPT terms based on minimizing the filter's approximating error using two l norms, one in the time domain and one in the frequency domain. For any specified filter gain, the time complexity of the algorithm is a second-order polynomial in the filter order. Examples show that our improved algorithm is capable of designing filters with better characteristics while using fewer SPT terms

Published in:

Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on  (Volume:1 )

Date of Conference:

30 Apr-3 May 1995