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We present a new monolithic silicon photonics technology and its application to manycore processor-to-DRAM networks. Our technology implements photonic components in a standard bulk CMOS process reducing costs and improving opto-electrical coupling compared to other photonic technologies. Simulation and preliminary experimental results show an order of magnitude better energy-efficiency and bandwidth-density than off-chip electrical links in the same technology generation. Exploiting the advantages of both electrical and photonic interconnect, we propose a manycore processor-to-DRAM network based on a "local meshes to global switches" topology. We illustrate the advantages of the proposed network architecture using analytical models and simulations with synthetic traffic patterns, and also introduce a technique for implementing such networks with a ring-filter matrix. Our work shows the importance of a vertically integrated approach to turn the advantages of photonic devices into system-level benefits.