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In order to combine the theory and practice of support vector machine (SVM) in the field of fault diagnosis, a novel universal experimental system for digital circuitspsila fault diagnosis is designed for the application study of SVM. The circuit is simulated in FPGA and its input and output pins are assigned to the DO and DI channels automatically by matrix switch. The faults and test points can be set easily. The algorithms of SVM and test vector generation etc. can be carried out in different software modules. The overall design and experimentation are discussed in detail. A practical example is given also. The experimental system is very convenient for the study of SVM and the efficiency is improved observably.