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A novel storage design for IP routing table construction is introduced on the basis of a single set-associative hash table to support fast longest prefix matching (LPM). The proposed design involves two key techniques to lower table storage required drastically: 1) storing transformed prefix representations; and 2) accommodating multiple prefixes per table entry via prefix aggregation, achieving superior storage-efficiency (SUSE). With each prefix (p(x)) maneuvered as a polynomial, p(x) - q(x) x g(a;) + r(x) based on a divisor g(x), SUSE keeps only q(x) rather than full and long p(x) in an r(x)-indexed table with 2degree(g(x)) entries, because q(x) and r(x) uniquely identify p(x). Additionally, using r(x) as the hash index exhibits better distribution than do original prefixes, reducing hash collisions, which can be tolerated further by the set-associative design. Given a set of chosen prefix lengths (called "treads"), all prefixes are rounded down to nearest treads under SUSE before hashed to the table using their transformed representations so that prefix aggregation opportunities abound in hash entries. SUSE yields significant table storage reduction and enjoys fast lookups and speedy incremental updates not possible for a typical trie-based design, with the worst-case lookup time shown upper-bounded theoretically by the number of treads (??) but found experimentally to be 4 memory accesses when ?? equals 8. SUSE makes it possible to fit a large routing table with 256 K (or even 1 M) prefixes in on-chip SRAM by today's ASIC technology. It solves both the memory- and the bandwidth-intensive problems faced by IP routing.