By Topic

FPGA-Based Self-Calibrating Time-to-Digital Converter for Time-of-Flight Experiments

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Junnarkar, S.S. ; Brookhaven Nat. Lab., Upton, NY, USA ; O'Connor, P. ; Vaska, P. ; Fontaine, R.

We describe the architecture of a FPGA-based self-calibrating Time to Digital Converter (TDC), specifically intended to measure the width of an input pulse. The configuration consists of two controllable ring oscillators with a very small difference in their frequencies, wherein this difference determines the achievable resolution. The calibration scheme relies on an accurate pulse-generator or external crystal-oscillator to provide a stable calibration pulse for the system. We implemented the TDC on an Altera Stratix II device where we measured a Least Significant Bit of 41 ps (an RMS resolution of 11.8 ps). We present details of the methods used to calibrate the TDC, the characterization process, and discuss the effects of variations in temperature and voltage.

Published in:

Nuclear Science, IEEE Transactions on  (Volume:56 ,  Issue: 4 )