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Symbolic analysis for fault detection in switch-level circuits

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2 Author(s)
L. Ribas Xirgo ; Centre Nacional de Microelectron., Univ. Autonoma de Barcelona, Spain ; F. Carrabina Bordoll

In CMOS logic circuits, stuck-on and bridging faults are of special importance. This paper presents the theoretical foundations of a symbolic method to detect their presence and, implicitly, offer a test vector to sensitize the fault being therefore measurable through IDDQ techniques

Published in:

Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on  (Volume:2 )

Date of Conference:

30 Apr-3 May 1995