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Cost-Effective 28-nm LSTP CMOS using gate-first metal gate/high-k technology

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40 Author(s)
T. Tomimatsu ; Renesas Technology Corp., Hyogo, 664-0005, Japan ; Y. Goto ; H. Kato ; M. Amma
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Metal gate/high-k CMOS technology for 28-nm node low power and low standby power application is demonstrated. A gate-first single metal/high-k gate stack has been employed together with leading-edge isolation, ultra-shallow junction, and stress engineering technologies. High density and high performance device is provided with least process cost increase.

Published in:

2009 Symposium on VLSI Technology

Date of Conference:

16-18 June 2009