By Topic

Guiding principles toward future gate stacks given by the construction of new physical concepts

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

1 Author(s)
Shiraishi, K. ; Grad. Sch. of Pure & Appl. Sci., Univ. of Tsukuba, Tsukuba, Japan

Recent LSI technologies require the introduction of a wide variety of materials and structures in addition to conventional aggressive down-scaling. As a result, present semiconductor devices contain various kinds of nano-scale interfaces and nano-structures. In this paper, we show that conventional physics concepts cannot be applied directly to these interfaces or structures and that construction of new physical concepts is crucial for establishing guiding principles toward future LSIs. In fact, we have succeeded in controlling effective gate work functions of high-k gate stacks based on our new interface physics concepts of "Oxygen vacancy induced Fermi level pinning". Moreover, we also propose guiding principles toward future Si nanowire (NW) FET based on atomic and electronic structures of Si NW.

Published in:

VLSI Technology, 2009 Symposium on

Date of Conference:

16-18 June 2009