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In this paper, a digital control approach is investigated for time-optimal load step response of DC-DC synchronous buck converters intended for point-of-load (PoL) applications and employing low-equivalent series resistance ceramic output capacitors. Unlike previously reported approaches, the proposed technique is insensitive to converter parametric variations and design uncertainties, as its operation does not rely on the knowledge of the output filter inductance or capacitance. The time-optimal response is achieved through a single on/off switching action undertaken as soon as a load transient is detected. In its most general formulation, the proposed technique automatically incorporates adaptive voltage positioning (AVP) regulation, according to the typical droop design guidelines for powering modern microprocessors. A simpler version, suitable for voltage-mode controlled PoL converters not requiring AVP positioning, is also presented. The technique employs an asynchronous A/D conversion scheme, which quantizes the converter state variables and triggers a nonlinear, event-based digital controller whenever a quantization level transition is detected. Additional sensing requirements are not needed, since the time-optimal transient is achieved through the measurement of the output voltage and, whenever AVP regulation is needed, of the phase currents. Effectiveness and properties of the proposed robust time-optimal approach are validated through both computer simulations and experimental tests on a synchronous buck converter prototype and a VHDL implementation of the control algorithm on an field programmable gate array device.