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Strategies based on periodic software-based self-test (SBST) represent an effective and cost-efficient solution for the detection of faults in low-cost embedded systems that do not require immediate recognition of error conditions. Today's integrated systems increasingly often include hardwired microprocessor devices and field-programmable gate array (FPGA) cores. We propose to implement a test-support module in the on-chip FPGA to observe critical processor signals and hence increase the observation capabilities in non-concurrent software-based on-line test strategies. Preliminary results are shown on a case study based on the Leon3 processor.