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Opportunities for parallelism when implementing algorithms in VHDL — a case study — Shift-Or

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3 Author(s)
Schulz, B. ; Sch. of Eng., Grand Valley State Univ., Grand Rapids, MI, USA ; Parikh, C. ; Trefftz, C.

Field Programmable Gate Arrays (FPGAs) are becoming pervasive in High Performance Computing systems, making it possible for developers to implement algorithms (or at least portions of algorithms) directly in hardware using Hardware Description Languages. The Shift-Or algorithm for exact string matching was implemented using VHDL on a XILINX FPGA. This paper discusses some of the opportunities for performance improvement offered by VHDL that were used when implementing the Shift-Or algorithm.

Published in:

Electro/Information Technology, 2009. eit '09. IEEE International Conference on

Date of Conference:

7-9 June 2009