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A distributed hardware algorithm for scheduling dependent tasks on multicore architectures

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1 Author(s)
Di Gregorio, L. ; Infineon Technol. AG, Munich, Germany

We present a novel hardware algorithm for scheduling tasks with dependency constraints on multicore architectures. This algorithm provides a deadlock-free scheduling over a large class of architectures by employing a generalization of a fundamental algorithm by Tomasulo. Performance measurements show that the proposed algorithm can deliver higher performance than a large increase in the number of processing cores. Several authors have already pointed out how the ldquothreadsrdquo model of computation can lead to a painstaking and error-prone programming process. Our approach does not preclude backward compatibility and the use of traditional techniques, but still supports a different and more advanced programming model, which is generally better suited for many complex embedded multicore systems.

Published in:

Intelligent solutions in Embedded Systems, 2009 Seventh Workshop on

Date of Conference:

25-26 June 2009