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A 145 MHz user-programmable gate array

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2 Author(s)
do Valle Simoes, E. ; Federal Univ. of Rio Grande do Sul, Porto Algere, Brazil ; Barone, D.

This work aims to present the most relevant results derived from the development of a novel FPGA matrix. Nevertheless its capacity, its highlights are low cost and its ability to deal with high frequencies. This prototype matrix, named FLECHA, presents some structural novelties, as a different approach to perform the interconnections between logic cells and I/O pads and an internal controller. One of the major contributions of this work deals with the strategy of placing the logic cells in rows, allowing a drastic reduction of the number of switches without reducing interconnection capacity between logic cells and I/O pads. Following this principle, a new matrix presenting 600 equivalent gates was constructed including 40 logic cells and 40 programmable I/O pads. The FLECHA matrix is intended to implement simple logic functions as for fast “glue logic” between processors and memories, reaching an operational frequency of l45 MHz

Published in:
Rapid System Prototyping, 1995. Proceedings., Sixth IEEE International Workshop on

Date of Conference: 7-9 Jun 1995

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