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An integrated data path synthesis algorithm based on network flow method

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2 Author(s)
Taewhan Kim ; Lattice Semicond. Corp., Milpitas, CA, USA ; Liu, C.L.

We present an integrated approach to the solution of the scheduling, allocation (register and interconnections), and binding problems in high-level synthesis. Our algorithm synthesizes a data path from an unscheduled-data flow graph with an objective of minimizing both the number of control steps and total design area. Unlike most of the prior approaches in which interconnections are determined only in the final step of the synthesis process in our approach, scheduling of operations binding of operations to functional units, and binding of variables to registers are performed simultaneously so that interconnections are determined optimally for each control step. The problem is formulated as a minimum cost maximum flow problem in a network which can be solved in polynomial time using the minimum cost augmentation method. Experimental results on a number of benchmark problems show that the approach is quite effective

Published in:

Custom Integrated Circuits Conference, 1995., Proceedings of the IEEE 1995

Date of Conference:

1-4 May 1995