By Topic

Divergent path random number generators

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)

This paper presents a class of digital true random number generators. The random number generators can be described using any digital design methodology such as HDL descriptions or logic diagrams. Hence these types of true random number generators are easily implemented in FPGAs and ASICs. Several components are presented along with implementation details and test results. These particular designs generate 32 bit random numbers but the principle is easily extended to any desired bit length.

Published in:

Southeastcon, 2009. SOUTHEASTCON '09. IEEE

Date of Conference:

5-8 March 2009