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Analytical models for vias and traces are presented for simulation of multilayer interconnects at the package and printed circuit board levels. Vias are modeled using an analytical formulation for the parallel-plate impedance and capacitive elements, whereas the trace-via transitions are described by modal decomposition. It is shown that the models can be applied to efficiently simulate a wide range of structures. Different scenarios are analyzed including thru-hole and buried vias, power vias, and coupled traces routed into different layers. By virtue of the modal decomposition, the proposed method is general enough to handle structures with mixed reference planes. For the first time, these models have been validated against full-wave methods and measurements up to 40 GHz. An improvement on the computation speed of at least two orders of magnitude has been observed with respect to full-wave simulations.