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In this paper, we present the design of a GALS wrapper used in Network on Chip (NoC) based on standard cells. The GALS wrapper includes two communication ports, 4-phase handshake circuits, data buffer and signal synchronizer. The detailed design methodology of GALS wrapper is given and the circuits are validated with Verilog-HDL and implemented in FPGA. The simulation results show that the wrapper provides fast and reliable asynchronous communication services for the subsystems working with different clocks in NoC.
Computer Science and Information Engineering, 2009 WRI World Congress on (Volume:3 )
Date of Conference: March 31 2009-April 2 2009