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Energy Efficient Instruction Cache with Local Access Scheme

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3 Author(s)
Ming Yang ; Beijing Microelectron. Technol. Inst., Beijing, China ; Lixin Yu ; Heping Peng

As power consumption of the cache memory in modern processor designs tends to dominate, measures must be taken to keep it under control. This paper introduces an approach for reducing instruction cache power based on the operation of a local access control scheme added in the cache system. The average saving on the power consumption of the instruction cache could be up to 23% compared with the traditional instruction cache structure.

Published in:

Computer Science and Information Engineering, 2009 WRI World Congress on  (Volume:3 )

Date of Conference:

March 31 2009-April 2 2009

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