By Topic

CMOS Active Inductor Linearity Improvement Using Feed-Forward Current Source Technique

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Chun-Lee Ler ; Fac. of Electr. Eng., Univ. of Technol. Malaysia, Skudai, Malaysia ; A'ain, A.K.B. ; Kordesch, A.V.

MOSFET drain current second-order nonlinearity has a significant impact on the linearity of current regulated CMOS active inductors. It tends to compress MOSFET transconductance (g m) by generating excess dc current (I EX) in the channel, which is a function of incoming input signal amplitude. This generated excess dc current can change the original dc operating point of the current regulated CMOS active inductor, and thus, influence the inductance. Unfortunately, MOSFET drain current second-order nonlinearity contributes more to MOSFET g m compression than MOSFET drain current third-order nonlinearity. In this paper, a new technique known as feed-forward current source (FFCS) has been proposed to improve the linearity of the active inductor. The proposed FFCS technique makes use of the second-order nonlinear property of a MOSFET that generates I EX when an input ac signal is applied. The generated I EX is then fed-forward to the current source of the active inductor to drain out the I EX in the active inductor. This prevents the dc operating point from shifting and improves its inductance linearity. Single-ended and differential active inductors with the proposed FFCS circuit have been fabricated using Silterra's CMOS 0.18-mum technology to verify the proposed technique.

Published in:

Microwave Theory and Techniques, IEEE Transactions on  (Volume:57 ,  Issue: 8 )