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Improving the Size of Communication Buffers in Synchronous Models With Time Constraints

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3 Author(s)
Guoqiang Wang ; Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA ; Marco Di Natale ; Alberto Sangiovanni-Vincentelli

Model-based development of embedded applications is a major trend in industry because of the possibility of early validation and verification of properties by simulation or formal methods. Synchronous reactive models are characterized by a formally specified semantics, which avoids ambiguities in the interpretation of the model, and by the availability of efficient code generation tools, which help increase productivity. The validity of the simulation and/or verification results on the model is retained only if the generated code is guaranteed to preserve model semantics. At the same time, the implementation must make efficient use of the execution platform resources. One of the essential issues for efficient implementation is the use of communication buffers that exploit the multirate behavior of the components. In most embedded devices, RAM memory is scarce and buffer size should be kept at a minimum. We present an approach to buffer size optimization by using timing information about the components. The approach was applied to an automotive case study, showing for the specific case an improvement of at least 7.5% with respect to previous methods.

Published in:

IEEE Transactions on Industrial Informatics  (Volume:5 ,  Issue: 3 )